About Lesson
Programmable Logic Block for Peripheral Interface
Design Specification
Mode of Operation for Programmable Logic Block for
Peripheral Interface
Microarchitecture Definition for Programmable
Peripheral Interface
Flow Diagram Definition for Programmable Peripheral
Interface
Synthesizable Verilog Code for Programmable
Peripheral Interface
Simulation for Programmable Peripheral Interface
Design
Demonstration by using Verilator Integrated with
GTKWave